Industrial-Grade AI in EDA: From Promise to Practice — A Siemens Panel at DAC 2025

Industrial-Grade AI in EDA

Generative AI: The Hype, The Hope, The Hard Truths — And the Debate at DAC

The semiconductor industry is no stranger to bold claims. But few topics today spark more debate — or more genuine…

From Rule-Based Beginnings to AI-Driven Design: Tracing the Evolution of AI in EDA

As we gear up for the 62nd Design Automation Conference (DAC) in San Francisco, one of the most anticipated events…

User2User

Closing the Gap in Software Skills for Verification Engineers

I’m excited to announce next month’s U2U (User-to-User) meeting, followed by a crucial technical training session that no hardware verification…

GOMACTech 2025 Preview: FPGA Safety and Security Policy Compliance via HDL-to-Bitstream Equivalence Checking (Session 43.5)

Security and safety policies across domains such as embedded security, defense safety, and automotive safety have been updated to require…

DVCon 2025: A must for hardware design and verification engineers

I’ve attended every DVCon US conference since its inception, over 30 years ago. I’ve also given keynotes at DVCon India….

Siemens at DVCon 2025: Don’t Miss the Luncheon and More!

The latest trends in verification are in—and they’re more than just surprising. They’re alarming. Join Siemens EDA at DVCon 2025 for an exclusive luncheon…

Breaking the Bottleneck: A Smarter Approach to Semiconductor Verification

The semiconductor industry is facing a new reality: traditional verification methods can no longer keep pace with the rapid evolution…

osmosis 2024

osmosis 2024 – pushing the boundaries of formal verification

Thank you for making osmosis 2024 a success! The annual osmosis 2024 event has once again proved to be a…